Fierce & AggressiveMLSys · GPU Systems · Deep Learning HardwarePart 0 EESignals and Systems Lecture notes for Signals and Systems based on Soliman & Srinath: the definition of a signal, continuity and the …Digital Logic Circuits Lecture notes for Digital Logic Circuits based on Floyd: analog and digital quantities, logic levels, pulses and …Part 1 Compiler01 Loop-Invariant Code Motion: From Loop Body to Preheader LLVM LICM moves an invariant multiplication and addition from a loop body into its preheader. A C-to-IR diff shows how …00 LLVM IR and the Compilation Pipeline: From C Code to Machine Code Starting from the difference between interpreters, JITs, and AOT compilers, emit LLVM IR from C with clang, decode it, …Part 2 CUDA05 CUDA Concurrency: Streams, Async Copies, and Overlap How data copies and kernel execution are placed in the same time window, explained in the order host and device memory, …04 CUDA Unified Memory: Virtual Address, Placement, and Coherence How the CPU and GPU share one memory allocation, explained through virtual addresses, data placement and migration, …03 CUDA Shared Memory: Tiling, Bank Conflicts, and Reduction Global memory coalescing, shared memory tiling, bank conflicts with padding and swizzle, occupancy, warp divergence and …02 CUDA C Basics The CUDA C execution model from the ground up: the compilation pipeline, why the 3-stage memory transfer is the …01 NVIDIA GPU Architecture Genealogy: Tesla to Rubin One line from Tesla (2006) to Rubin (2026): how the NVIDIA SM stayed the same (SIMT, warp = 32, block per SM) while …00 GPU Architecture Primer: The Tesla Foundation Before CUDA C: the Tesla unified architecture (G80/GT200) from the 2008 IEEE Micro paper. The graphics-to-compute data …Part 3 MIT 6.59306.5930 L02 - From Einsum to DNN Workloads Complete L02 notes: accelerator design methodology, tensors and Einsum, iteration spaces, memory traffic, compute …MIT 6.5930: Hardware Architecture for Deep Learning MIT EECS 6.5930 by Prof. Vivienne Sze and Prof. Joel Emer, Hardware Architecture for Deep LearningPart 4 EmbeddedJetPack 6.2.2 Flash Troubleshooting: AMD USB Incompatibility and the chroot Solution Documenting the root cause of the tegrarcm_v2 USB write timeout on AMD hosts when flashing a Jetson AGX Orin, and a …Part 5 MIT 6.59406.5940 L01: Introduction and Overview Notes on MIT 6.5940 (Song Han) Lecture 1. From why DNN efficiency matters through Model Compression, Quantization …Part 6 General6.5930 L01 - Introduction and Applications A Word from Ilya Sutskever (L01-3) Early in the lecture there is a quote from Ilya Sutskever. “Compute has been …Opening Note GPU Systems & Deep Learning Hardware